In silicon chip fabrication, a common trend is to provide for smaller chips to support ever increasingly smaller devices. Alternatively and or in addition to smaller chips, there is a trend to add more functionality or components onto silicon chips. To facilitate such a trend to add more functionality and/or components onto silicon chips, there is need to provide smaller or thinner interconnections between such silicon chip components and/or leads that come from the components/silicon chips. This is particularly the case in silicon chip packages, such as quad flat packages or QFPs.
A QFP is a surface mount integrated circuit package with leads/connections that extend from each side of the package. A QFP and other silicon chip packages may be built up using wire bonding. Wire bonding is a process where interconnections are provided between an integrated circuit (IC) or other semiconductor device and its packaging during semiconductor device fabrication. In order to provide a smaller chip, the “flip chip” method may be incorporated in the IC fabrication. Flip chip processing adds additional steps in conventional chip fabrication. Such steps include adding attachment pads that are receptive to solder, also known as a bump interconnect process. To attach the flip chip into a circuit, the chip is inverted to bring the solder dots down onto connectors on the underlying electronics or circuit board.
Wire bonding has limitations as to how thin the leads can be. Furthermore, wire bonding is limited for die to die connections in multi-chip module (MCM) packages. Furthermore, wire bonding can be the largest contributor as to quality control of chips. In other words, wire bonding can be seen as where defects in chip packages are found. This may be attributable to weakened paths along the wire bonds. Although the flip chip process can overcome some of the wire bond shortcomings, the flip chip process involves additional and more complex steps that lead to greater silicon chip package costs. In certain cases, the added costs of assembling using the flip chip process is cost prohibitive for profitable product development.